Design and Implementation of Video Front End System Based on JS-6B1

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Abstract: JS-6B1/111 is a full I2C controlled frequency synthesis multi-standard video electronic tuner, which introduces the features and functions of the chip. The TV signal front-end processing system is designed by JS-6B1/111, and its hardware structure and software flow are given.
Keywords: high frequency head; tuning; single chip; I2C bus; TV

1 Overview

Most commonly used TV receivers use an electronic tuner (high frequency head) to select and receive television signals. The quality of the tuner is one of the important factors determining the quality of viewing. The function is to select the desired electrical signal from the antenna. The high frequency television signal of the channel, and the selected weak high frequency television signal is amplified to improve the sensitivity of the receiver, and finally convert the high carrier frequency television signal of any channel of the receiver through the mixing stage. A fixed image IF TV signal and audio first IF signal output. The tuner is generally connected to the intermediate frequency amplifying circuit, and the image and the accompanying sound signal output from the tuner are sent to the image in the channel for amplification, and finally displayed on various displays through some other processing at the back end.

The TV signal front-end processing system adopts Chengdu Xuguang's multi-standard video electronic tuner, which integrates the discrete tuner and the middle-discharge circuit. The performance is stable and the video signal and audio signal can be demodulated directly from the RF signal. At present, it is widely used in video reception and other aspects, and has achieved good results.

2 TV signal front-end processing system hardware circuit composition

Figure 1 shows the block diagram of the TV signal front-end processing system. As shown in the figure, the system is mainly composed of an image processing part, an LED display part, a storage part, an audio processing part, and a single chip control.

The image processing part is composed of a high frequency tuner JS-6B1/111, which processes the high frequency television signals of the PAL and NTSC systems received from the antenna, searches for the television program of the corresponding channel, and finally outputs the composite video signal (CVBS). For the circuit processing of the back end, taking the LCD TV as an example, the CVBS signal is input to the digital video decoder for luminance/chrominance separation and restored to RGB signals in the image processor, and finally the image is displayed; The E ² PROM uses the AT24C02 to store the TV program searched by the tuner; the LED display portion is used to display the channel number of the TV channel; the video front-end processing system is another part of the audio part, in the high-frequency tuner The output sound signal will be input to this part of the circuit, in which the sound effect controller selects SC7313 produced by Hangzhou Shilan Company, and the audio power amplifier selects TPA1517 produced by TI Company. The SC7313 includes an input multiplexer that can input three stereos, with 1.25dB attenuation and boost per level for its balance and loudness, independent mute control, volume, and bass control. The TPA1517NE is a 6 W audio power amplifier that performs power amplification on the signal output from the SC7313, ultimately driving the speaker to sound.

Figure 1 TV signal front-end processing system

The whole system is controlled by the single chip C8051FO23. C8051F023 is a single-chip microcomputer compatible with 51 single-chip microcomputer which is introduced by American Silabs. It has the characteristics of high speed, high performance and high integration. The system's program is stored in the internal 64KB FLASH program memory. Its function is to set the internal registers of JS-6B1/111, SC7313 and TPA1517NE in the system through the internal I ² C bus to complete the specified functions and coordinate the work of the whole system.

Introduction to the functions and features of 3 high frequency tuner JS-6B1/111

       JS-6B1/111 is powered by +5V, fully supplemented TV channels, multi-standard reception, including PAL B/G, I, D/K; NTSC M/N TV system, tuning and mid-range integration, all I ² C Control tuning, address decoding, AFC status information, etc. Direct demodulation, image output peak-to-peak value of 1V ± 0.2V (pp) and audio output of 500 ± 150mV (rms).

The JS-6B1/111 internal circuit is integrated in an all-metal rectangular shield to effectively resist electromagnetic clutter. The internal functions are mainly realized by the RF phase-locked loop part (using Philips' TDA6500TT) and the IF phase-locked loop (using Philips' TDA9885TS). The main working principle of JS-6B1/111 is: firstly input the RF TV signal received by the antenna into the filter of three different frequency bands for amplification and filtering, and divide the frequency into three frequency bands of high, medium and low, VL, VH, VUF, and The crystal oscillator is mixed with the corresponding three frequency bands, and the mixer generates an image intermediate frequency signal, which is sent to the intermediate frequency amplifier for amplification. The intermediate frequency signal is input to the phase-locked loop control intermediate frequency demodulation module through the SIF SAW (image intermediate frequency surface acoustic wave filter), and the module finally outputs the composite video signal and the sound signal.

The JS-6B1/111 has an I ² C interface inside to communicate with the microprocessor. There are two working modes of reading and writing for the JS-6B1/111 operation. The selection of the channel and the switching of the channel are mainly realized by controlling the partial writing of the tuner phase-locked loop by using the I ² C interface by the single-chip microcomputer, and the internal registers are shown in Table 1.

Table 1 JS-6B1/111 I ² C write control mode logic

In Table 1, A is the response signal after the tuner is successfully written one byte. In the address byte, MA1 and MA0 are used for I ² C address selection, which is determined by the input voltage of pin 9 of the high-frequency head JS-6B1/111. The address can have four numbers including 0XC0, 0XC2, 0XC4, and 0XC6. The pin is directly grounded. The corresponding MA1 and MA0 values ​​are 0 and 0, and the I ² C address is 0XC0. In addition, R/W indicates the read/write bit. When this bit is 0, it means to write to the chip. When it is 1, it means to read the chip; the frequency division ratio is used to set the frequency of the RF signal of the received TV channel. Its setting uses the divided programming byte 1 and the divided programming byte 2, as shown in the following formula:

N=20×(Frf.pc(MHz)+Fif.pc(MHz))=20×Fosc(MHz)

=8192×n13+4096×n12+2048×n11+1024×n10+512×n9+256×n8+128×n7+64×n6 + 32×n5+16×n4+8×n3+4×n2+2 ×n1+1×n0

Where: Frf.pc (MHz) corresponds to the image carrier frequency of the channel to be selected, Fif.pc (MHz) is the image intermediate frequency (PAL system is 38.0MHz), Fosc (MHz) corresponds to the local oscillator of the channel; control command word 1 The CP bit is the charge pump setting bit, which can be set to 0 or 1, respectively corresponding to the current 60uA and 280uA, respectively corresponding to the medium speed and fast tuning; OS bit is the working state of the PLL phase-locked loop; RSA, RSB bit In the setting of the tuning step, the adjustment precision is KHz; the control information word is used to select the band control of the channel to be received, including the VL, VH, UHF bands. The five control words in the table are written in standard I ² C timing mode and can be written in a single register or continuously.

The setting of the IF phase-locked loop register of the tuner should follow the typical settings. Take the PAL D/K system as an example. As shown in Table 3, the device write address of this part is 0X85. The adjustment function registers in the table are used for AGC control, which can be changed at any time via the bus according to the condition of each channel to achieve the optimal setting of each channel.

Table 3 IF phase-locked loop register

The internal lock state of the JS-6B1/111 can be read by the read mode of the I ² C bus. The corresponding information is shown in Table 4 and Table 5.

Table 4

table 5

The read address of the status information word of Table 4 is 0XC1. POR is the power flag. When POR=1, it indicates the power on state; FL is the internal lock flag, and FL=1 indicates the lock state. A2 to A0 are digital outputs of the AFC voltage. The digital information of AFC (Automatic Frequency Control) can be read out via the IF part bus. The AFC circuit is mainly used to track and lock the frequency and phase of the received signal. The register settings are shown in Table 5. AFCWIN is used to detect whether the VCO (Voltage Controlled Oscillator) is within the AFC window of ±1.6MHz; VIFLEV is used to indicate the current input level condition of the image IF signal; PONR is used to indicate whether the current register status is just reset or successful. Read the status of the message. AFC[4:1] has 16 states, and the corresponding value can be read to monitor the degree of deviation from the ideal image IF signal.

4 software implementation of TV signal front-end processing

4.1 automatic search

The software design flow of automatic search is given by taking the PAL D/K standard TV signal as an example. The automatic search program realizes searching all the channels received by the current antenna, and writes the frequency division coefficient (carrier frequency of the corresponding channel) and the frequency band information of the searched channel into the E ² PROM in the search order for channel switching. When the corresponding data is called, it is written to the corresponding register. The method of automatic search is shown in Figure 2. The internal circuit of the system C8051F023 used in this system

With I ² C bus interface, no need to use ordinary IO port for simulation, the system should be configured to power on. After that

The sound control chip is initialized so that the speaker sounds when the corresponding channel is searched.

Figure 2 automatic search software process

Channel search uses a method from low frequency to high frequency search. The image carrier frequency range is 49.75MHz to 865MHz, the tuning step size is 62.5KHz, and the image carrier frequency is fine-tuned by ±0.5MHz at 62.5KHz per step. First, search from 49.75MHz, write its corresponding frequency division coefficient to the tuner for tuning, delay the 20ms system and stabilize the voltage value of the ADC. When the fine adjustment is performed, the voltage values ​​read out twice before and after satisfying the first The second reading is (0.45 to 0.60) Vcc, the second reading is (0.15 to 0.10) Vcc or the first reading is not (0.15 to 0.30) Vcc, and the second reading is (0.15~). When 0.30) Vcc, read the AFC[4:1] status word of the tuner, otherwise continue fine-tuning until the requirement is met. When reading the AFC value, only two readings at intervals of 7ms are at ±37.5KHz, indicating that there is a TV channel at the frequency, and its corresponding frequency division coefficient and frequency band information are written into the E ² PROM. Then, according to the frequency table, jump to a frequency point and repeat the above process to continue searching and storing the station. When there is no station, the jump does not exist, and the highest frequency is 865MHz.

4.2 channel conversion

Channel conversion currently uses button control. When a button is pressed, the MCU enters the corresponding interrupt processing program, and judges whether it is down or up, and displays the corresponding channel number on the LED, and divides the frequency division coefficient and frequency band of the corresponding channel. The information is taken out of the E ² PROM and sent to the tuner to switch channels.

5 innovative ideas

At present, the television signal front-end processing system is used in the driving card of the liquid crystal television, and has realized clear and stable display of the television image and perfect reproduction of the sound. In the process of automatic search, the phenomenon of missing platform is studied, which is our innovation point. For this project, when the synchronization signal of the external decoder is used for auxiliary judgment, and the tuning step of the search station is appropriately reduced, the occurrence of the missing phenomenon can be avoided. When a TV channel is selected, it can be recorded in the E ² PROM to complete the save function.

references

[1] Wang Heming, Zhang Zhongyou, Wang Jianye et al. Micro-integrated phase-locked frequency synthesizer controlled by single-chip microcomputer. [J] Microcomputer Information, 1999, No.3, 69-70.

[2] Yu Chunli, Yang Linan. Single-chip microcomputer control of digital tuning PLL frequency synthesizer for AV system. [J] Microelectronics and Computer, 2002, the first issue, 38-43.

[3] Wang Weidong, TV Principles and Systems [M], Chongqing: Chongqing University Press, 2003.

[4] Shi Wuxin. Phase-locked loop digital frequency synthesis tuning tuning technology. [J] Television Technology, 2001, 223 (1), 33-34.

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