Samsung Electronics develops a backplane for semiconductor packaging

South Korea's Samsung Electronics has developed a backplane for semiconductor packaging. The thickness is 0.08mm (80μm), which is about 20% thinner than the 0.1mm floor plate developed by the company in 2005. Flash memory, SRAM, etc. can be stacked in 20 layers or more.

This board can support higher packing density. Instead of using a common substrate manufacturing method, a circuit transfer method is employed. The internal circuit can be formed at a 20 μm interval of 20 μm finer than the original 25 μm to increase the strength of the substrate by 50% or more. In addition, the company has independently developed a material called CCTL (CopperCladTapeLaminates) in order to use the new method.

The company has supplied samples to semiconductor manufacturers around the world and promoted their acceptance. It is planned to start mass production at the Daejeon Office's dedicated production line for semiconductor packaging from the end of 2007. The company is applying for 33 patents related to this development at home and abroad.
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