Talking about the Market Development and Trend of Codec Chips in the Future

With the rapid development of chip technology, the competition among chip manufacturers has gradually shifted from technological competition to price and market competition, and competition has become increasingly fierce. This article focuses on Texas Instruments (TI) and Hess Semiconductor, two major mainstream chip makers. TI is the inventor of the digital signal processor (DSP). He once monitored the market with the chip DM642. In 2006, Hass teamed up with Huawei to leverage its technology and market advantages. , the first to launch H in the world. 264 SoC monitoring chip Hi3510, a great showdown with TI.

The chip scheme tends to diversify The current SoC integration of encoding/decoding single-chip system is becoming higher and higher, the hardware codec performance of multi-processor cooperation is greatly improved, which increases the difficulty of chip design and brings a huge challenge. The integration of hardware and systems, multi-core cooperation, large amounts of DMA and memory data management, resulting in more and more complex systems, the stability must be verified through a large number of tests to solve.

At present, many excellent NVRs, DVRs, and network camera manufacturers in China are equipped with codec products for monitoring and controlling the industrial market. Their reliability and stability requirements are relatively high. Because industry users have many specialized customization requirements, they are dealing with graphics, Compression and transmission requirements vary, so vendors need stable, reliable and flexible custom-developed chip solutions.

At present, we can use two HDVICP coprocessors to complete 16-channel D1 encoding, leaving all the DSP chip resources to meet future customization needs of users. The design and production of 8-channel and 16-channel D1 encoders and encoder cards based on this scheme have been completed and mass production has been completed.

TI's DM8168 chip targets D1's DVR and hybrid DVR market, which can significantly reduce the cost and complexity of DVR systems. It integrates all the capture, compression, display and control functions of high-definition multi-channel systems onto a single chip, which can fully meet the needs of users for high integration and high-definition video. This chip integrates the DSP core of the 1GHz clocked Cortex-A8 ARM core and the 1GHz clock frequency C674x, and integrates three new versions of the HDVICP2.0 subsystem and a new generation of VPSS. Compared with the video compression performance, the new version of the DM8168 HDVICP2.0 subsystem is four times faster than the previous generation of the mainstream DM6467 lGHz version, and can support H. 264 encoded 3 1080p frames per second, or up to 30 full-frame D1 resolution videos. The new version of HD VICP not only supports HD resolution H. 264, MPEG-4, VC1, but also supports AVS and SVC standards. In addition, it also provides a rich set of external interfaces, including Gigabit Ethernet, PCI Express, SATA2, DDR2, DDR3, USB 2.0, MMC/SD, HDMI, and DVI, to support highly flexible design solutions.

TI retains the architecture of the CPU+DSP and uses the HDVICP video coprocessor to leave DSP resources to the device developer for more professional customization capabilities, such as embedded intelligent algorithms.

According to Hass, the Hi3531+ and Hi3532 ASIC chip solutions have the same performance as the DM8168. At present, some data are still in the confidential phase and are expected to be released by October 2011.

The suggestions and expectations for chip vendors are the direct users of the chip. The general selection principles of video surveillance vendors are based on the definition of the product and the working environment to compare different chips, and at the same time purchase the EVM development board for the pre-research evaluation of the solution. And test to verify whether the function and performance of the chip meet the requirements. Then we need to understand the maturity and stability of the chip, and estimate the overall product cost, development cost and development difficulty. Low power consumption, energy saving and environmental protection are also aspects that need to be considered. The strong technical support of chip manufacturers is an important condition. .

From the supplier's point of view, we hope that chip manufacturers can greatly improve the performance of the codec while ensuring the consistency of the chip architecture to facilitate the continuation and succession of development and ensure that suppliers can create more technology accumulation. The value of accelerating product development and time to market, saving development costs.

Current DVR and NVR chip solutions have too high power consumption, and the core chip TDP is as high as more than 10 W, which is much higher than that of Intel's X86 architecture low-power CPU. This gives power supply design, thermal design, and reliability. The design has brought great challenges. Its stability needs a lot of long-term batch test verification to ensure that the entire design cost, verification cost, and BOM cost are increased. Therefore, further reducing the power consumption and improving the packaging process are also the next steps that chip manufacturers need to improve.

Demand for high-definition decoding is increasingly high among industry customers. Some DVRs choose to use ST's high-performance set-top box decoding core to complete decoding. Therefore, chip manufacturers need to consider supporting more general-purpose decoding libraries to improve the compatibility and functionality of decoding cores. Even if the decoding core module program runs abnormally, it will not cause the entire system to crash. You can use software to automatically reset or user intervention to restore, does not affect the device's other acquisition and compression and transmission functions to ensure the reliability of the equipment system.

In the city-level monitoring system, when it comes to social access, it will encounter many manufacturers' equipment access problems, how to perfect access and display to the user the best customer experience. This is also a problem that we and the chip manufacturers need to work together to solve. We cooperate with Intel's development based on the X86 architecture to utilize its hardware decoding core with 2-way 1080p@30f decoding performance and powerful CPU processing capability up to 2GHz clock speed. Through the combination of software and hardware decoding to enhance the decoding part of the monitoring system. compatibility.

Based on the demand of HD-SDI, it is expected that chip manufacturers can provide more flexible and flexible digital video interfaces to meet the digital video input of four 1080p@30f channels. The monitoring program of HD-SDI is in a period of development and the supporting equipment is mature. Development will be of great help. We hope that chip manufacturers can pay enough attention.

If chip manufacturers can spend more time sending relevant product managers and technical engineers to communicate and instruct regularly with video surveillance vendors, and provide suppliers with detailed product introduction and technical training, it will be beneficial for both parties to deepen mutual understanding.

If chip manufacturers can open up more software code for the bottom-level driver software and hardware-encoded video processing software, it will help to create more innovative products that better meet market demands, thereby avoiding product homogeneity and promoting market prosperity.