Scalable solution to the challenges of class D amplifier design
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High-performance audio equipment designers from home theaters to powered speakers have found that Class D amplifiers are attractive because they save space. Unfortunately, these designers are not familiar with the concept of PWM switching amplifiers used in Class D amplifiers because their experience is deeply rooted in linear topologies such as Class AB amplifiers.The challenge they face is related to the switching mode of the power transistor, which requires complete turn-on or complete turn-off. A well-tuned and well-protected PWM switching circuit reliably performs the above operations. But a design with small errors or non-ideal parameters can easily lead to a complete failure of the prototype. When the amplifier self-destructs, it is difficult to find out the specific cause. Correcting errors can therefore add significant time and cost to project development.
To speed up the design of Class D amplifiers, International Rectifier (IR) has integrated four major Class D amplifier building blocks into a single-chip solution (see Figure 1). By combining an error amplifier, PWM comparator, gate driver stage circuitry, and overload protection, the IRS2092 can be optimized to improve the performance and flexibility of end products.
Error amplifier with noise isolation
The main indicators of audio amplifiers are noise and total harmonic distortion (THD). Among the Class D amplifiers, factors affecting these specifications include limited switching time, overshoot/undershoot, and power supply fluctuations. Improving these factors requires improving the performance of the error amplifier. The error amplifier is used to compare the output audio signal with the input audio signal and correct these defects in the output stage circuit based on the comparison.
The noise environment required for a Class D amplifier is different from that required for a Class A or Class A/B design, so finding a suitable op amp is a complex and time consuming process. The IRS2092 integrates an optimized op amp with high noise rejection and a bandwidth of 5MHz, achieving a 0.005% THD in the design example shown in Figure 2.
Noise isolation
The Class D amplifier topology requires that the front and rear ends are close together. In a discrete implementation, the designer must determine how to isolate the noise-sensitive analog input portion from the unwanted switching noise in the large signal output stage.
Figure 1: IRS2092 single-chip solution
Figure 2: Relationship between THD+N ratio and output power
In the single-chip solution, the most difficult challenges include how to achieve sufficient electrical isolation between the two circuits described above. The IRS2092 uses a proprietary semiconductor junction isolation method to ensure noise isolation.
PWM comparator and level shifting
Once the error amplifier processes the input audio signal and outputs a signal that is proportional to the input signal, the comparator converts the analog signal into a pulse width modulated (PWM) signal.
When the PWM comparator of the IRS2092 converts the analog signal into a PWM signal, the propagation delay is small, so it has greater flexibility in optimizing the feedback loop design.
The next challenge is to route the PWM signal from a quiet error amplifier circuit to a noisy switching stage circuit. There is a high-voltage level shifter that converts the digital signal to a different floating potential, so the PWM signal can be accurately transmitted regardless of the voltage difference between the two sides, just like an ideal differential amplifier.
Gate drive and MOSFET switch stage circuit
The gate drive stage circuit receives the PWM signal from the comparator, the reference level is ground level, and performs low level conversion on the signal to form a gate drive signal with source reference levels of the high side and low side MOSFETs, respectively. . At the gate drive stage, a dead time is inserted between each ON state to prevent simultaneous ON states in the high side and low side MOSFETs.
Precise door control is the key to superior audio performance. The gate driver's pulse width distortion must be small and should achieve a perfect match between the high side and low side gate drive stages. Both of these attributes are critical to minimize dead time and improve amplifier linearity.
Dead time insertion
Dead time insertion is the most critical part of the switching stage circuit design for Class D amplifiers. By adjusting the MOSFET's limited switching transition time, the dead time prevents shoot-through and ensures safe operation of the amplifier. However, this also creates nonlinearities that can cause unexpected distortion. Designers often have to compromise between THD performance and safety margins.
The IRS2092 has built-in dead time control, and the designer can select the dead time width based on the selected MOSFET. Compared to the external dead time control design, the width of the integrated dead time insertion is guaranteed, and the designer does not need to estimate the worst case.
Overload protection
Since the power dissipation of the MOSFET is proportional to the square of the load current, the protection circuit typically monitors the load current to prevent the MOSFET from failing under overcurrent conditions. An external shunt resistor is typically used to sense the load current, but factors such as resistor selection and noise filtering are critical and may increase development time, cost, and physical size of the entire design.
The protection circuit is also required to support compensation correction for additional switching noise caused by stray inductance in critical current loop paths in the power stage.
In the integrated building block chip, the built-in overload protection depends on the on-resistance of the MOSFET. The integrated circuit monitors the output current and will turn off the PWM when the preset threshold is exceeded. In addition, the positive temperature coefficient of the MOSFET on-state resistance decreases the overcurrent threshold as the junction temperature increases, thereby enhancing the safety of the amplifier.
Conclusion: Plug and Play Upgradeable Class D Amplifier
Through the integration of these four key functions, the IRS2092 provides a plug-and-play Class D amplifier solution that has implemented a very important protected PWM switching stage circuit. Its high level of integration solves many design challenges, but it also has the flexibility to allow engineers to customize certain features to meet specific design needs.
It is also very easy to adjust the amplifier to provide different output power levels or to implement different numbers of channels. Simply select the appropriate external MOSFET pair and adjust the dead time and overload protection threshold accordingly. External MOSFETs also allow engineers to optimize EMI and efficiency to meet application requirements.
Finally, the complete scalable capability also allows sharing of a common infrastructure design across multiple products, and the IRS2092 will continue to reduce its cost and time to market as end products evolve.
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