Using FPGA to build high-level video surveillance system
The high-resolution (HD) security monitoring and processing system at the full video frame rate has increasingly higher requirements for processing devices. Single-chip DSP processing can no longer adapt. Multi-chip, multi-core, or CPU + DSP methods, although in some cases Can meet the demand, but it still has some problems in PCB cost, system resource occupation and system stability. The new system architecture that uses the flexible features of FPGA to load the video processing engine is attracting people's attention.
Using FPGA to build high-level video surveillance system (with photos)
Cost and performance challenges
Jiang Yungui, senior system architect of Xilinx Asia, said that the market size of the surveillance video intelligent analysis system will reach 800 million US dollars in 2012. For designers and providers of video surveillance network equipment such as cameras and DVRs, single-chip solutions are not commercially or technically feasible due to processing performance, cost, and power constraints. The programmable and cost-effective advantages of their Spartan-3ADSP FPGA can meet various monitoring functions such as cameras, virtual obstacles, object lag and people statistics, and are integrated into cameras in a single chip.
FPGA to achieve this requires a powerful video processing engine to support, Eutecus, Berkeley, California has developed a cellular vision technology (CVT), this is the next generation of extremely high-speed image stream capture and processing technology, integrated independent A large number of parallel processing architectures and algorithms. Stephen D. Hester, president and CEO of Eutecus, said that CVT technology is inspired by the human eye's processing structure. With this technology, they can provide image processing IP for FPGAs and other devices for the intelligent video surveillance and security markets. "We encountered difficulties in developing a multi-core video analysis engine (MVE)," Hester said. "Our first-generation products are based on TI's DaVinci SoC. But in the second-generation products, we need more processing power. And system integration. Multiple DSP device solutions are not cost-effective at the cost or system level. We need one that can easily port the previous generation of products and provide more features for our second-generation MVE Single chip solution. "
Processing architecture based on Spartan-3A
After some research, Eutecus found Xilinx's Spartan-3ADSP3400A. The 126 XtremeDSPDSP48A logic chips in the device can provide up to 30GMAC of DSP performance, so they can fully meet the demanding cost and performance requirements of video analysis applications. MVE can handle high-definition resolution at the video frame rate, and the power is less than 1W. It is an easy-to-configure, compact processing architecture that integrates the inherent parallel multi-core processing architecture and embedded complex video analysis algorithms in a configurable building block, thus simplifying hardware design and programming. MVE can comprehensively execute multiple event detection and parallel classification algorithms simultaneously.
From one platform to another platform architecture, portability is an important factor to consider. Xilinx's EDK embedded development kit can implement a dual-processor hardware architecture based on XilinxMicroBlaze embedded processors, which is similar to the dual-processor hardware architecture of TI's DaVinci platform. As a result, Eutecus has no concerns about design migration.
"MVE is embedded in Xilinx Spartan-3ADSPFPGA, which can enable a single chip in a smart camera or other network device such as DVR to achieve complex video analysis functions." Jiang Yungui said, "Using FPGA can add more video analysis functions according to customer needs. And related event detection examples. You can use the same hardware platform to create many different derivative products. Eutecus uses VHDL to design a variety of analysis accelerator engines, and integrate these dedicated cores into the C-MVA coprocessor. This method allows Engineers re-use dual MicroBlaze embedded systems to create different FPGA programming files, which constitutes a highly scalable solution that can be easily adjusted to a wide range of video analysis applications. "
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