DARPA's six new initiatives address the challenges facing the semiconductor roadmap

DARPA has released three broad agency announcements (BAAs) that describe six new initiatives to address the issues that Moore predicted 50 years ago and will face at the end of the current semiconductor roadmap.

According to Bill Chappell, director of the Office of Microsystems Technology (MTO) at the Defense Advanced Research Projects Agency (DARPA), Gordon Moore's law of fame has been guiding the industry for decades and is also the latest for DARPA. The release of the additional regulations for its Electronic Renaissance Program (ERI) provides ideas. DARPA has released three broad agency announcements (BAAs) that describe six new initiatives to address the issues that Moore predicted 50 years ago and will face at the end of the current semiconductor roadmap. These plans will add $75 million a year to ERI, raising the projected annual budget for this four-year plan to $216 million. DARPA called its new plan called Page 3 Investments to pay tribute to Moore - Moore published in April 1965 in Electronics magazine "Climbing More Components on ICs" (Cramming More Components on Integrated Circuits), page 3 of which describes these research challenges, DARPA extracts from its plans.

Figure 1: DARPA reinforces the three pillars of its e-Revitalization program—materials, architecture, and design—through six new programs related to Gordon Moore's research requirements predicted 50 years ago.

Heat problem

Can the heat generated by thousands of components in a single semiconductor chip be dissipated?

If we can shrink the size of a standard high-speed digital computer to the size of its component itself, then we can expect that it will glow brightly in terms of current power consumption. But using integrated circuits will not be the case. Because the integrated electronic structures are two-dimensional, they have surfaces available for cooling close to each heat center. In addition, electrical energy is primarily used to drive various lines and capacitors associated with the system. As long as the function is limited to a small area on the wafer, the capacitance that must be driven is significantly limited. In fact, in terms of the same power consumption per unit area, if the size of the integrated structure is reduced, the structure can be operated at a higher speed.

"liquidation day"

Obviously, we will be able to build such highly integrated devices. Next, we have to ask: Under what circumstances, we should do this. The total cost of implementing a particular system function must be minimal. To do this, we can spread the project to several of the same projects, or develop flexible techniques for projects that contain large functions so that a specific set of features does not cover a disproportionate cost. Perhaps the newly invented design automation program can be directly converted from a logic diagram into a technical implementation without any special engineering processing. Building large systems with smaller features that are individually packaged and interconnected may prove to be more economical. The availability of large-scale functions, combined with functional design and construction, should enable large system manufacturers to design and build a wide range of equipment quickly and economically.

Linear circuit

Integration does not completely change linear systems like digital systems. However, linear circuits will still achieve a significant degree of integration. In the linear world, the inability of integrated circuits to integrate large-value capacitors and inductors is their biggest major limitation.

In terms of the nature of capacitance and inductance, these devices need to store energy in a certain volume. To achieve a high Q value, the device volume must be large. The large-capacity and integrated circuits run counter to one another from the terminology itself. It is expected that some resonance phenomena (such as resonance phenomena in piezoelectric crystals) will have some tuning function applications, but for a considerable period of time, inductors and capacitors will never be integrated.

Future integrated RF amplifiers are likely to include integrated gain stages that provide high performance at minimal cost and are interspersed with relatively large tuning elements.

Other linear functions will change a lot. The matching and matching of similar components in the integrated structure will enable a significantly improved differential amplifier design. Using the thermal feedback effect to accurately stabilize the integrated structure at a certain temperature will enable the construction of an oscillator with good crystal stability.

Even in the microwave field, structures included in the definition of integrated electronics will become more and more important. The ability to manufacture and assemble smaller components compared to the wavelengths involved will enable the use of a lumped parameter design at least at lower frequencies. It is now difficult to predict how far an integrated circuit will be able to reach the microwave field. For example, the successful implementation of phased array antennas using multiple integrated microwave power supplies can revolutionize the radar.

According to Chappell, by continuing Moore's Law, ERI plans to "stand on the shoulders of Moore" to ensure the continuation of the "maximum commercial interests and the strongest defense capabilities."

Chappell believes that DARPA's ERI program can continue Moore's Law indefinitely, and the program has been dedicated to solving the fundamentals of materials and integration, circuit design, system architecture, and strengthening basic research.

Figure 2: DARPA's “Page 3” Investment – ​​Excerpted from Gordon Moore's 1965 paper on the future of the electronics industry.

DARPA's new 3D Monolithic System-on-Chip (3DSoC) program is designed to accelerate computing at lower power consumption by packaging processors, logic, memory and inputs/outputs in a power-saving, high-profile 3D cube. Raise fifty times. The second program, funded by the same BAA as the 3DSoC program, is the foundation for a new computer (FRANC) that will overturn John von Neumann's separate data and storage capabilities. DARPA claims that combining data and storage functions will overcome storage bottlenecks that transfer data from memory to the processor and vice versa. These efforts will require the development of new materials (such as memristors), components (such as artificial neurons and synapses), and algorithms (including algorithms for modeling human brains).

The second new BAA is a two-way effort to redefine the specialization of circuits and systems. The Electronic Asset Intelligence Design (IDEA) program will focus on automated design so that even non-engineering technicians can describe the functions to be performed, and the robot design automation system can complete the design work overnight. The Posh Open Source Hardware (POSH) initiative will support complementary open source verification frameworks to examine and redesign even the most complex system-on-chip and printed circuit boards produced by IDEA when necessary.

The third BAA also contains two plans. Software-Defined Hardware (SDH) will serve as a “decision assistant” for reconfigurable hardware/software, running data-intensive algorithms for artificial intelligence applications using dedicated ICs to handle thousands of modern warfare and civilian big data applications. Smart, surveillance and reconnaissance sensors. The Complementary Domain-Specific System-on-Chip (DSSoC) initiative is designed to develop multi-application hardware/software systems that users can mix and match to address software definitions including mobile communications, satellite communications, personal area networks, and all types of radars. Problems such as radio (SDR). Chappell said SDR applications will be used for electronic warfare between 2025 and 2030.

This article authorizes compilation from EE Times. "Electronic Technology Design" November 2017 issue, please indicate the source and link.